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65 lines
1.6 KiB
65 lines
1.6 KiB
#include "LPC8xx.h" |
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#include "syscon.h" |
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#include "swm.h" |
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#include "spi.h" |
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#include "uart.h" |
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#include "utilities.h" |
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#include "chip_setup.h" |
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#include "lib_ENS_II1_lcd.h" |
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#define SPIBAUD 115200 |
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#define SCK_PIN P0_19 |
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#define MOSI_PIN P0_18 |
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#define SSEL_PIN P0_21 |
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// |
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// Main routine |
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// |
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int main(void) { |
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// Enable clocks to relevant peripherals |
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LPC_SYSCON->SYSAHBCLKCTRL[0] |= (SPI0|SWM); |
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// Configure the SWM (see peripherals_lib and swm.h) |
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ConfigSWM(SPI0_SCK, SCK_PIN); |
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ConfigSWM(SPI0_MOSI, MOSI_PIN); |
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ConfigSWM(SPI0_SSEL0, SSEL_PIN); |
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// Give SPI0 a reset |
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LPC_SYSCON->PRESETCTRL[0] &= (SPI0_RST_N); |
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LPC_SYSCON->PRESETCTRL[0] |= ~(SPI0_RST_N); |
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// Enable main_clk as function clock to SPI |
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LPC_SYSCON->SPI0CLKSEL = FCLKSEL_MAIN_CLK; |
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// Get main_clk frequency |
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SystemCoreClockUpdate(); |
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// Configure the SPI master's clock divider (value written to DIV divides by value+1) |
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LPC_SPI0->DIV = (main_clk/SPIBAUD) - 1; |
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// Configure the CFG register: |
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// Enable=true, master, no LSB first, CPHA=0, CPOL=0, no loop-back, SSEL active low |
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LPC_SPI0->CFG = SPI_CFG_ENABLE | SPI_CFG_MASTER; |
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// Configure the SPI delay register (DLY) |
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// Pre-delay = 0 clocks, post-delay = 0 clocks, frame-delay = 0 clocks, transfer-delay = 0 clocks |
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LPC_SPI0->DLY = 0x0000; |
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// Configure the SPI control register |
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// Master: End-of-frame true, End-of-transfer true, RXIGNORE true, LEN 8 bits. |
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LPC_SPI0->TXCTL = SPI_CTL_EOF | SPI_CTL_EOT | SPI_CTL_RXIGNORE | SPI_CTL_LEN(8); |
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// Init LCD Screen |
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init_lcd(); |
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lcd_puts("Test e-paper"); |
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lcd_position(1, 0); |
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lcd_puts("Init ok"); |
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while(1) { |
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}; |
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} // end of main |
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